1. Field of the Invention
This invention relates generally to chemical mechanical planarization, and more particularly to partial-membrane carrier heads for use in a chemical mechanical planarization process.
2. Description of the Related Art
In the fabrication of semiconductor devices, planarization operations are often performed, which can include polishing, buffing, and wafer cleaning. Typically, integrated circuit devices are in the form of multi-level structures. At the substrate level, transistor devices having diffusion regions are formed. In subsequent levels, interconnect metallization lines are patterned and electrically connected to the transistor devices to define the desired functional device. Patterned conductive layers are insulated from other conductive layers by dielectric materials, such as silicon dioxide.
As more metallization levels and associated dielectric layers are formed, the need to planarize the dielectric material increases. Without planarization, fabrication of additional metallization layers becomes substantially more difficult due to the higher variations in the surface topography. In other applications, metallization line patterns are formed in the dielectric material, and then metal planarization operations are performed to remove excess metallization. Further applications include planarization of dielectric films deposited prior to the metallization process, such as dielectrics used for shallow trench isolation or for poly-metal insulation. One method for achieving semiconductor wafer planarization is the chemical mechanical planarization (CMP) process.
In general, the CMP process involves holding and rubbing a typically rotating wafer against a moving polishing pad under a controlled pressure and relative speed. CMP systems typically implement orbital, belt, or brush stations in which pads or brushes are used to scrub, buff, and polish one or both sides of a wafer. Slurry is used to facilitate and enhance the CMP operation. Slurry is most usually introduced onto a moving preparation surface and distributed over the preparation surface as well as the surface of the semiconductor wafer being buffed, polished, or otherwise prepared by the CMP process. The distribution is generally accomplished by a combination of the movement of the preparation surface, the movement of the semiconductor wafer and the friction created between the semiconductor wafer and the preparation surface.
FIG. 1A is a diagram showing a conventional table based CMP apparatus 50. The conventional table based CMP apparatus 50 includes a carrier head 52, which holds a wafer 54, and is attached to a translation arm 64. In addition, the table based CMP apparatus 50 includes a polishing pad 56 that is disposed above a polishing table 58, which is often referred to as a polishing platen.
In operation, the carrier head 52 applies downward force to the wafer 54, which contacts the polishing pad 56. Reactive force is provided by the polishing table 58, which resists the downward force applied by the carrier head 52. A polishing pad 56 is used in conjunction with slurry to polish the wafer 54. Typically, the polishing pad 56 comprises foamed polyurethane or a sheet of polyurethane having a grooved surface. The polishing pad 56 is wetted with a polishing slurry having both an abrasive and other polishing chemicals. In addition, the polishing table 58 is rotated about its central axis 60, and the carrier head 52 is rotated about its central axis 62. Further, the polishing head can be translated across the polishing pad 56 surface using the translation arm 64. In addition to the table based CMP apparatus 50 discussed above, linear belt CMP systems have been conventionally used to perform CMP.
FIG. 1B shows a side view of a conventional linear wafer polishing apparatus 100. The linear wafer polishing apparatus 100 includes a carrier head 108, which secures and holds a wafer 104 in place during processing. A polishing pad 102 forms a continuous loop around rotating drums 112, and generally moves in a direction 106 at a speed of about 400 feet per minute, however this speed may vary depending upon the specific CMP operation. As the polishing pad 102 moves, the carrier head 108 rotates and lowers the wafer 104 onto the top surface of the polishing pad 102, loading it with required polishing pressure.
A bearing platen manifold assembly 110 supports the polishing pad 102 during the polishing process. The platen manifold assembly 110 may utilize any type of bearing such as a fluid bearing or a gas bearing. The platen manifold assembly 110 is supported and held into place by a platen surround plate 116. Gas pressure from a gas source 114 is inputted through the platen manifold assembly 110 via a plurality of independently controlled of output holes that provide upward force on the polishing pad 102 to control the polishing pad profile.
An effective CMP process has a high polishing rate and generates a substrate surface which is both finished, that is, lacks small-scale roughness, and flat, meaning that the surface lacks large-scale topography. The polishing rate, finish and flatness are determined by the pad and slurry combination, the relative speed between the substrate and pad, and the force pressing the substrate against the pad.
The polishing rate depends upon the force pressing the substrate against the pad. Specifically, the greater this force, the higher the polishing rate. If the carrier head applies a non-uniform load, i.e., if the carrier head applies less force to one region of the substrate than to another, then the low pressure regions will be polished slower than the high pressure regions. Therefore, a non-uniform load may result in non-uniform polishing of the substrate.
FIG. 2 is an illustration showing a conventional carrier head 108, which includes a stainless steel plate (not shown) surrounded by a retaining ring 200 for holding a wafer in position during polishing. Covering the stainless steel plate, and positioned within the retaining ring 200, is a carrier film 202. In addition, vacuum holes 204 are positioned in the stainless steel plate and corresponding positions in the carrier film 202.
The carrier film 202 is designed to absorb pressure during wafer polishing, thus preventing hot pressure spots from occurring on the wafer surface. In the present disclosure, the term xe2x80x9chot pressure spotsxe2x80x9d refers to wafer surface areas wherein increased downforce pressure results in a higher removal rate for that wafer surface area. Thus, hot pressure spots can result in non-uniformity problems during CMP processing, which are generally avoided by the use of the carrier film 202.
During wafer processing, the wafer must be transported from station to station. To facilitate wafer transportation, the carrier head 108 includes vacuum holes 204 that allow the carrier head 108 to pick up and drop off the wafer. For example, after completing a polishing operation, the carrier head 108 transports the wafer from the surface of the polishing belt to the next station in the wafer fabrication process. However, the wafer often experiences xe2x80x9cstictionxe2x80x9d with the polishing belt. That is, the combination of the polyurethane of the polishing belt surface and the slurry often causes the wafer to adhere to the surface of the polishing belt. To break this adhesion, the carrier head 108 applies a vacuum to the back of the wafer via the vacuum holes 204, which allows the carrier head 108 to lift the wafer from the surface of the polishing belt. After transporting the wafer to the next wafer fabrication station, the carrier head 108 applies a positive airflow through the vacuum holes 204 to release the wafer from the carrier film 202 of the carrier head 108.
Unfortunately, the vacuum holes 204 of the carrier head 108 cause low removal rate areas on the surface of the wafer, which result in non-uniformity errors. FIG. 3 is a diagram showing an exemplary wafer 104 resulting from CMP operations using a conventional a carrier head. During the CMP process the carrier film on the carrier head is wet. However, when vacuum is applied through the carrier head vacuum holes, the vacuum tends to dry out the carrier film around the vacuum holes, which can make the carrier film softer in the regions of the vacuum holes. In addition, there is no direct wafer support in the regions of the vacuum holes. Thus, because of the dry carrier film and lack of wafer support in the region of the vacuum holes, the low removal rate xe2x80x9cvacuum holexe2x80x9d regions 300 occur on the surface of the wafer 104. The resulting non-uniformity can have a dramatic negative effect on the devices formed on the wafer, often causing the entire wafer to be discarded. Moreover, the vacuum holes of the conventional carrier head allow the mechanics of the vacuum to take in slurry when vacuum is on. This slurry often finds its way into the internal mechanics of the tool, where it is generally detrimental.
Carrier heads have been developed that attempt to avoid low removal rate vacuum hole regions on the surface of the wafer. For example, one conventional carrier head uses an inflatable bladder essentially in place of the stainless steel plate to transfer downforce to the back of the wafer during the CMP process. However, this inflatable bladder requires a floating retaining ring that complicates the CMP process. Moreover, the floating retaining ring generally causes undesirable edge effects, wherein the removal rate at the edge of the wafer is very high with respect to the remainder of the wafer.
In view of the foregoing, there is a need for a carrier head that avoids low removal rate vacuum hole regions on the surface of the wafer. The carrier head should be usable on various types of CMP systems, and should not require undue experimentation and engineering to implement. In particular, the carrier head should not require overly complex systems, such as a floating retaining ring, and should provide a uniform wafer surface during CMP.
Broadly speaking, the present invention fills these needs by providing a partial-membrane carrier head that avoids low removal rate vacuum hole regions in the surface of a wafer. Embodiments of the present invention replace the plurality of vacuum holes on the carrier head with a larger centralized vacuum hole. During polishing, a bladder or membrane is inflated in the region of the centralized vacuum hole such that pressure in the region of vacuum hole is essentially equal to the polishing pressure.
For example, in one embodiment, the carrier head includes a metal plate having an opening formed in a central location. The metal plate has a wafer side, which faces the backside of a wafer during a CMP operation, and a non-wafer side. Positioned above the non-wafer side of the metal plate, and located above the opening in the metal plate, is a bladder. To facilitate uniformity during polishing, an inflating pressure is applied to the bladder substantially equivalent to a polishing pressure utilized during the CMP operation. The carrier head can further comprise a carrier film, which is positioned on the wafer side of the metal plate. The carrier film is disposed between the metal plate and the backside of the wafer during a CMP operation. In this aspect, the metal plate and the bladder can provide a substantially uniform force to the carrier film. To facilitate transporting the wafer, a vacuum can be applied to the opening in the metal plate to adhere the wafer to the carrier head. The bladder can be deflated when the vacuum is applied to the opening in the metal plate. Further, to release the wafer from the carrier head the bladder can be inflated such that it protrudes through the opening in the metal plate.
A further carrier head for use in a CMP process is disclosed in an additional embodiment of the present invention. The carrier head includes a metal plate having an opening formed in a central location. As above, the metal plate has a wafer side, which faces the backside of a wafer during a CMP operation, and a non-wafer side. Positioned above the non-wafer side of the metal plate, and located above the opening in the metal plate, is a membrane. To facilitate uniformity during polishing, a pressure is applied to the membrane that is substantially equivalent to a polishing pressure utilized during the CMP operation. As above, the carrier head can further comprise a carrier film, which is positioned on the wafer side of the metal plate. The carrier film is disposed between the metal plate and the backside of the wafer during a CMP operation. In this aspect, the metal plate and the membrane can provide a substantially uniform force to the carrier film. To facilitate transporting the wafer, a vacuum can be applied to the opening in the metal plate to adhere the wafer to the carrier head. To release the wafer from the carrier head a releasing pressure can be applied to the membrane, such that the releasing pressure causes the membrane to protrude through the opening in the metal plate.
A method for polishing a wafer during a CMP process is disclosed in yet a further embodiment of the present invention. The method includes positioning a wafer on a carrier head that includes a metal plate having an opening formed in a central location, and a bladder positioned above the opening in the metal plate. The bladder is situated on a side of the metal plate opposite a side on which the wafer is positioned. The wafer is applied to a polishing surface with a particular polishing pressure using the carrier head. In addition, the bladder is inflated to a pressure that is substantially equivalent to the polishing pressure, and the surface of the wafer is polished. Similar to above, a carrier film can be positioned between the metal plate and a backside of the wafer, such that the metal plate and the bladder provide a substantially uniform force to the carrier film. In addition, a vacuum can be applied to the opening in the metal plate to adhere the wafer to the carrier head to facilitate transporting the wafer. To release the wafer from the carrier head, the bladder can be inflated such that the bladder protrudes through the opening in the metal plate to release the wafer from the carrier head.
Embodiments of the present invention can be advantageously utilized to polish wafers without generating low removal rate vacuum hole regions of the wafer surface. In particular, because the plurality of vacuum holes is removed, low removal rate vacuum hole regions are not generated on the wafer surface in those areas. Further, the bladder and membrane provide pressure in the region of the centrally located vacuum hole during polishing. Thus, a low removal rate vacuum hole region is prevented from occurring in the wafer surface in the region of the centrally located vacuum hole. Other aspects and advantages of the invention will become apparent from the following detailed description, taken in conjunction with the accompanying drawings, illustrating by way of example the principles of the invention.